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 By Gérard Boudon, Haluk Aytac*, John Fakiris **, AMCC Embedded Products Group - 91105 Corbeil-Essonnes, France *AMCC EPG - Sunnyvale, CA USA **AMCC EPG - Cary, NC USA Abstract — IO Processors (IOP) are key elements for storage application to attach to a Host the maximum number of IO’s such as RAID disks, capable for high speed data movement between the Host and these IO’s and able to perform function such as parity computation for RAID (Redundant Array of Independent/Inexpensive Disks) applications. A second generation [1] 800MHz PowerPC SOC working with 800MHz DDR2 SDRAM memory and on-chip L2 cache, executes up to 1600 DMIPS is described in this paper. It is designed around an high speed central bus (12.8 GBytes/sec PLB) with crossbar switch capability, integrating 3 PCI express ports, plus one PCI-X DDR interface and RAID 5 & 6 hardware accelerator. The RAID 6 algorithm implement 2 disk parities, with the second Q parity generation based on the finite Galois Field (GF) Primitive